CMC Microsystems is collaborating with Innotime Technologies (www.innotime.ca) to develop design capability for a multi-technology interposer platform that will enable 2.5D integration of heterogeneous chip technologies in a compact physical form. Resulting prototypes will be amenable to laboratory testability as well as integration with other sub-systems and system prototyping resources (other hardware as well as embedded software). Users of this technology platform will be able to:
• design and manufacture a chip-scale circuit that integrates multiple chips on a single silicon substrate (bare die, bumped chips, chip-scale packages, packaged components or passives)
• customize the routing of electrical signals between them, and
• interface the assembled sub-system to the outside world using a standard ball grid array connection.
Routing between chips is managed through a circuit redistribution layer (RDL) on the interposer top surface that is user-defined using a process-specific PDK. The chips are bonded to the RDL and interposer using either wire-bonding or flip chip technology. The interposer includes Through-Silicon Vias (TSV) as a means of connecting the assembled sub-system to the package interface. CMC will offer multi-project wafer fabrication runs for the interposer and access to flip chip assembly services that will allow users to quickly and cost-effectively develop their integrated prototypes.